Mohammed Adil is a highly motivated Verification Engineer currently working as a Sr. ASIC Digital Design Engineer at Synopsys, specializing in Verilog, SystemVerilog, and UVM. With past roles at Ignitarium and Texas Instruments, they have demonstrated expertise in IP-level verification, ensuring bug-free delivery for USB 3.x and developing custom verification methodologies for radar chips. Adil is pursuing a Master of Technology in Electronics Design and Technology at Tezpur University, while also working towards a Bachelor of Technology in Electrical, Electronics, and Communications Engineering at Lovely Professional University. They are passionate about contributing to innovative projects and expanding their knowledge of next-generation technologies.
Location
Bangalore Urban, India
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