Mukul Garg is a Sr R&D Engineer at Synopsys with over four years of experience in designing, characterizing, and verifying embedded memory compilers. They have worked on various SRAM and register file architectures at cutting-edge technology nodes, including N3 and N2. Mukul has also served as a Teaching Assistant at the Indraprastha Institute of Information Technology, Delhi, and is pursuing a Master of Technology in VLSI & Embedded Systems at the same institution. They hold a Bachelor of Technology in Electrical Engineering from Govind Ballabh Pant Engineering College.
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