Murthy Palla

Murthy Palla is a Principal R&D Engineer at Synopsys Inc, where they focus on solving complex engineering problems in the Electronic Design Automation (EDA) domain and applying Machine Learning models to enhance chip design and analysis. They hold a PhD in Electrical Engineering from Universität Bremen, as well as a Master of Science from Technische Universität Darmstadt and a B.Tech in Electronics and Communications Engineering from Acharya Nagarjuna University. Previously, Murthy worked as a Lead Engineer at Taray Technologies and was a Member of the Consulting Staff at Cadence Design Systems. Their early career included roles as a Student Assistant at Fraunhofer Institute and a Research Assistant at Infineon Technologies.