Narciso Neves is a Manager of R&D at Synopsys Inc, where they focus on the test and characterization of Super Speed Phys protocols including USB3.0, PCIe, SATA, OIF, and XAUI. They began their career as a Trainee at Chipidea Microelectronics, progressing to Test Engineer, where they developed ATE test plans and conducted chip characterization. Neves also worked at MIPS Technologies as a Test Engineer before continuing their journey at Synopsys since 2009. They hold a Licentiate degree in Electrical Engineering from the Polytechnic of Leiria, awarded in 2006.
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