Narinder Singh

Narinder Singh is a Staff Physical Design Engineer at Synopsys with over 5 years of experience in Physical Design. Having previously held positions at NXP Semiconductors and the Semiconductor Laboratory at MIETY, Narinder has worked on advanced projects involving technologies such as 5nm and 40nm. Narinder's expertise includes floorplanning, placement and routing, physical verification, and scripting, utilizing tools like SYNOPSYS and CADENCE. Narinder earned an M.Tech in VLSI Design from Thapar Institute of Engineering and Technology and a B.Tech in Electronics and Communications from Punjabi University.