Naveen Batra is an Architect in Memory Design at Synopsys, Noida, where they focus on memory specifications, customer interactions, and new feature development. With extensive hands-on experience across various tech nodes from 2nm to 90nm, Naveen has excelled in circuit design, compiler development, and project management. Previously, they held roles at ST Microelectronics and Synopsys, significantly contributing to memory architecture evaluation and design validations. Naveen is known for their proactive approach, analytical skills, and dedication to team growth, receiving numerous awards for execution excellence throughout their career. They earned a Bachelor of Engineering in Electrical, Electronics, and Communications Engineering from Netaji Subhas Institute of Technology.
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