Navya Glancy is an emulation engineer at Synopsys Inc, where they focus on validating post-run debug technology. Previously, they worked as a verification engineer at Xilinx and held the position of Senior Validation Engineer and later Staff Engineer at Synopsys from 2018 to 2021. Navya earned a Bachelor of Engineering in Electrical, Electronic and Communications Engineering from Karunya University and a Master of Technology in VLSI from Vellore Institute of Technology.
Location
Bengaluru, India
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