Neil More is currently a Staff Engineer in R&D Engineering at Synopsys Inc, a position held since February 2025. Prior to this, Neil served as a Lead Engineer in IP SoC Design Verification at HCLTech from 2021 to 2025 and as an Engineer VLSI at Silicon Interfaces from 2020 to 2021. Neil holds a Post Graduate Diploma in VLSI Technology from the Centre for Development of Advanced Computing and a Bachelor of Engineering in Electronics Engineering from the University of Mumbai. Additionally, Neil completed a program in Advanced Embedded Systems at IITians Embedded Technosolutions in 2018.
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