Nishant Ranjan is currently a Staff R&D at Synopsys, where they focus on design and IP verification. Prior to this role, they served as a Staff Engineer at Western Digital, taking ownership of the verification of the Address Generation Module and leading key development activities in UVM for NAND flash memory. Nishant has a Master of Technology in Microelectronics from the Birla Institute of Technology and Science, Pilani, and a Bachelor of Technology in Electrical, Electronics, and Communications Engineering from Jaypee University of Information Technology.
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