Pankaj Kalra is an experienced ASIC Design Engineer currently serving as a Senior Staff Engineer at Synopsys, specializing in chiplet connectivity and multi-die systems. Pankaj previously held roles at AMD as a Senior Silicon Design Engineer and at Xilinx as a Senior Design Engineer I and Design Engineer II, focusing on IP design for the latest platforms. With a Bachelor of Technology in Electronics and Communications Engineering from GLA University, Pankaj has cultivated a strong foundation in VLSI design, including substantial experience with FPGA platforms.
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