Partha Bose is an experienced engineering manager with a strong background in analog and mixed-signal IC design. Currently serving as an R&D Engineering Manager at Synopsys Inc since August 2023, Partha previously held key positions at Intel Corporation, where responsibilities included leading layout activities for Analog & Power ICs and managing the Analog & Mixed Signal Layout Group. Prior roles include Team Lead at Sankalp Semiconductor, overseeing the layout team for the Mixed Signal Solutions Group, and various engineering positions focused on high-speed I/O and custom analog blocks. Partha began the career in research and development with a research assistant role at ekLakshya VLSI R&D Centre and as an Assistant System Engineer at Tata Consultancy Services. Partha holds an MTech in Electronics from Jadavpur University and a BTech in Instrumentation Engineering from Haldia Institute of Technology.
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