Payel Debnath is a current Staff Engineer at Synopsys Inc, having previously held roles as a Senior Engineer and Application Engineer. Before this, Payel interned and worked as a PD Engineer at L&T Technology Services in 2021. Payel is pursuing a Bachelor of Engineering in Electronics and Telecommunication Engineering at the Tripura Institute of Technology and a Master of Technology in VLSI Design at the National Institute of Technology Agartala. Payel achieved GATE qualification in 2019.
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