Pragya Gupta is an ASIC Digital Design Engineer specializing in Verification IP and serves as a Staff Engineer at Synopsys Inc. Previously, Pragya worked as an Engineering Trainee at Mentor Graphics, focusing on the verification of electronic designs and systems using SystemVerilog. Pragya has held multiple roles at Synopsys Inc, advancing through the ranks from ASIC Digital Design Engineer I to ASIC Digital Design Engineer II. Pragya earned a Bachelor of Science in Electronics and Computer Engineering from Trinity College Dublin and a Bachelor of Engineering from Thapar University.
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