Prannoy Roy

Prannoy Roy is a Sr Engineer at Synopsys Inc., specializing in RTL design with extensive experience in FPGA-based systems and proficiency in protocols such as AXI4 and Avalon. They hold a Master of Technology in VLSI Design and Embedded Systems from the National Institute of Technology Raipur and have previous experience as a Hardware Engineer at Happiest Minds Technologies. Prannoy also served as a Teaching Assistant at the National Institute of Technology Raipur, supporting their academic community. They possess strong skills in Verilog and relevant design tools like Vivado and Cadence Xcelium.