Prateik Suvarna graduated with a Master of Science in Electrical Engineering from San Jose State University in Spring 2014, specializing in Digital VLSI Design. They have held roles such as ASIC Design Engineer at Micron Technology and currently serve as a Staff Test & Validation Engineer at Synopsys Inc. Prateik has gained experience with front-end ASIC design, RTL coding, and various CAD tools, including Cadence Virtuoso and Synopsys VCS. Their expertise also encompasses timing analysis, scripting, and functional validation in VLSI environments.
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