Priya Agarwal

Priya Agarwal is an experienced ASIC Digital Design Engineer and currently serves as a Staff Engineer at Synopsys Inc, a position held since 2024. Prior to this, Priya held roles as a Senior Design Engineer at Truechip and worked as a Design and Verification Engineer following a trainee position at Truechip Solutions. They completed a Bachelor of Technology in Electronics and Telecommunication Engineering from the College of Engineering Roorkee in 2018 and pursued a PG Diploma in VLSI from the Centre for Development of Advanced Computing (C-DAC). Priya has a strong background in design verification within the semiconductor industry, adept in tools such as SystemVerilog and Universal Verification Methodology (UVM).