Puneet Singh

Puneet Singh is a Principal ASIC Physical Design Engineer at Synopsys Inc, with over 12 years of experience in physical design across various technology nodes, including 2nm to 14nm. They have a robust background in executing complex block-level designs, focusing on key competencies such as synthesis, timing closure, and ECO flows. Puneet previously worked at Intel Corporation, where they were responsible for partition execution and convergence on advanced technology nodes. They are also pursuing degrees at Birla Institute of Technology and Science, Pilani, and Guru Gobind Singh Indraprastha University.