Rachit Sarkar

Rachit Sarkar is an R&D Engineering Senior Engineer at Synopsys Inc, specializing in IP RTL Design for SLM IPs since September 2023. Prior to this role, Rachit served as an R&D Engineer II at Synopsys, also focusing on IP RTL Design. Rachit's experience includes working as a Silicon Design Engineer 2 at AMD, contributing to the development of next-generation Ryzen processors on a 4nm technology node. Rachit began an academic career as a Teaching Assistant at the Indian Institute of Technology, Roorkee, where assistance was provided for the course ECN 614 (Adaptive Signal Processing). Earlier technical experience includes an internship as a Summer Trainee at Mitsubishi Electric in India, where Rachit worked on factory automation products. Rachit holds a Master of Technology in Communication Systems Engineering from the Indian Institute of Technology, Roorkee, and a Bachelor of Technology in Electronics and Communication Engineering from Heritage Institute of Technology.