Rahul Kashyap

Rahul Kashyap is a highly skilled Staff Engineer at Synopsys Inc since January 2021, with a strong background in ASIC digital design and verification. Prior to this role, Rahul served as a Verification Engineer at eInfochips, specializing in IP Level, SoC Level, and Block Level Verification, and developed UVM testbench architecture from scratch. Additionally, experience includes a position as Project Engineer at the Indian Institute of Technology, Jodhpur, focusing on analog and mixed signal design, along with a role as Teaching Assistant at S V National Institute of Technology, Surat, where lectures on various VLSI design topics were delivered. Academic credentials consist of a Master of Engineering in VLSI and Embedded System Design from GTU PG School and a Bachelor of Technology in Electrical, Electronics, and Communications Engineering from Govt. Engineering College Bikaner.