Rahul Tiwari

Rahul Tiwari is a Layout Design Engineer at Synopsys Inc since August 2023, specializing in the logic library team to deliver high-performance layout of standard cells. Prior experience includes a role as a PD/STA Trainee at VLSI Expert Private Limited from July 2022 to July 2023, and a Research Intern position at VLSI System Design from February 2023 to May 2023, where implementation of mixed-signal SoCs was undertaken. Involved with IEEE Computer Society as a member and served as an ambassador for IEEE Day 2021. Educational qualifications include a Foundation of VLSI Design certification from VLSI Expert and a Bachelor's degree in Electronics and Communication Engineering from Techno Main Salt Lake. Additional experience includes a summer internship focused on wireless sensor networks and machine learning applications during time at the Indian Institute of Technology (Banaras Hindu University) in 2020.