Rauf S

Rauf S is currently a Manager of ASIC Physical Design at Synopsys and has been involved in various roles within the tech industry since 2008. They have extensive experience at Nokia India Pvt Ltd, where they specialized in logic synthesis for 3G modem blocks and timing optimization. Rauf also worked as an R&D Engineer at Synopsys, implementing RTL to GDS for multiple test chips. They hold a Master’s degree in Digital Electronics and Communication Systems from PESIT Bangalore and continue their education at PACE Mangalore.