Ravi Teja G

Ravi Teja G has a solid background in engineering, with a Bachelor of Technology in Electrical, Electronics and Communications Engineering from the Indian Institute of Space Science and Technology and a Master of Technology in VLSI Design from Vellore Institute of Technology. Experience includes an internship at ISRO Satellite Centre, where responsibilities included designing a flash memory board prototype for satellites, and various roles at Synopsys Inc, progressing from Senior Application Engineer 1 to Senior Application Engineer 2, focusing on primeclosure PE. Prior positions include a SoC Design Engineer at Intel Corporation, specializing in full chip Static Timing Analysis for client products, and a Senior Application Engineer at Dorado Design Automation, responsible for tapeout support and timing closure for multiple fabrication technologies. Early career experience also includes work as an AE intern with exposure to TWEAKER ECO methodologies.