Riya Sachdeva is an Analog Design Manager with over 12 years of experience in IO and standard cell characterization, behavioral modeling, and physical and EDA views generation and validation. Riya completed a Master's degree in VLSI Design from Banasthali Vidyapith between 2012 and 2014. They began their career with an internship at STMicroelectronics in 2013 and went on to hold positions at Masamb Electronics Systems and INVECAS as a Design Engineer and Senior Design Engineer. Since 2020, Riya has been working at Synopsys Inc, advancing through roles from Staff Engineer to their current managerial position.
Location
Noida, India
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