Robert Gharibyan is a Senior Staff R&D Engineer at Synopsys, where they focus on integrated circuit layout visualization and analysis. With over 20 years of experience in object-oriented analysis and multi-layered client-server application development, Robert has worked on various projects ranging from stock market systems to chip manufacturing tools. They hold a Master's degree in Applied Mathematics from Yerevan State University. Previously, Robert served in various engineering roles at HPL Armenia, Altacode, and Synopsys, contributing to projects that emphasize time-critical systems and performance optimization.
Location
Colombia
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