Ronald Bedard is a Staff Physical Design Engineer at Synopsys Inc, specializing in high-speed IO design, validation, and integration. With extensive experience that includes roles at Intel, Ronald implemented high-speed DDR PHY in various technologies and led significant design initiatives, including ESD full chip architecture. Previously, Ronald contributed to product engineering at Digital Equipment Corporation and served as a Senior Product Engineer at Intel, driving advancements in chip design. Education includes a Master of Science and a Bachelor of Science in Electrical Engineering from Worcester Polytechnic Institute and the University of Massachusetts Lowell, respectively.
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