Sameer Badachi is a self-motivated and enthusiastic professional with expertise in VLSI physical design and static timing analysis on advanced nodes, currently working as an R&D Engineer Staff at Synopsys Inc since 2021. Previously, Sameer held roles at Synopsys as an R&D Engineer Sr II, focusing on ARM core and advanced node solutions, and has experience with Mentor Graphics and RV-VLSI Design Center. Sameer is pursuing a Bachelor of Engineering in Electronics and Communication from Visvesvaraya Technological University.
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