Sameer Badachi is an advanced technology professional specializing in VLSI physical design and static timing analysis on cutting-edge nodes. Currently serving as an R&D Engineer Staff at Synopsys Inc since 2021, Sameer previously led ARM flow and methodology development for advanced nodes. With an educational background in Electronics and Communication from Visvesvaraya Technological University, Sameer has gained extensive experience across multiple roles in industry leaders such as Mentor Graphics and RV-VLSI Design Center, focusing on innovative solutions in semiconductor design and methodology.
Location
Sunnyvale, United States