Sandesh Pandey is a Design Verification Engineer at Synopsys Inc, bringing over seven years of experience in verification IP development within UVM environments. Formerly with Qualcomm, Sandesh specialized in the development of advanced verification methodologies and protocols. They hold a Master of Technology in Microelectronics from BITS Pilani and a Bachelor of Technology in Electronics & Communication Engineering from Dr. A.P.J. Abdul Kalam Technical University, where they ranked 10th in their class. Sandesh is also a NI Certified LabVIEW Developer, showcasing their versatility in both hardware and software development.
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