Santhosh PR is an experienced Design Verification Engineer currently working as an ASIC Digital Design Staff Engineer at Synopsys Inc. They previously held positions as a Design Verification Engineer at Confidential, a Verification Engineer at Wipro Limited, and a verification contractor at Rambus. Santhosh also gained experience at SASIC Technologies Private Limited and has a Bachelor of Engineering in Electronics and Communication from UBDT College of Engineering, Davanagere. Proficient in UVM, SystemVerilog, and Ethernet, Santhosh has a strong background in the semiconductors industry.
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