Sebastien Pilate is a Microelectronic R&D Architect at Synopsys Inc, where they have been a Senior R&D FPGA Design Engineer since 2019. Previously, they worked as a Senior R&D Software Engineer at Synopsys Inc from 2012 to 2019, and as an R&D Software Engineer at Emulation and Verification Engineering from 2002 to 2012. Sebastien studied at Université Pierre et Marie Curie (Paris VI) from 1997 to 2002.
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