Seera Reshma is a Senior ASIC Physical Design Engineer at Synopsys, currently working as a Senior Test and Validation Engineer specializing in Static Timing Analysis. With over two years of experience in the semiconductor industry, Seera managed various projects involving advanced technology nodes from 7nm to 1.8nm at Cerium Systems and Quest Global. Seera holds a Bachelor of Technology in Electronics and Communication Engineering from GMR Institute of Technology, where they achieved a notable academic record. Additionally, Seera has a solid foundation in scripting languages like TCL and Python, alongside proficiency in key physical design tools and methodologies.
This person is not in the org chart
This person is not in any teams
This person is not in any offices