Selva Karthick is an Analog Design Staff Engineer at Synopsys Inc., where they are currently involved in high-speed clock management and SERDES design. Previously, Selva worked as an Analog Circuit Design Engineer at Arasan Chip Systems Inc. and held the position of Hardware Design Engineer at Data Patterns (India) Pvt Ltd. Selva also briefly served as a Senior Analog Circuit Design Engineer at Mirafra Technologies in 2024. They earned a Bachelor of Engineering in Electrical and Electronics Engineering from Dr. Sivanti Aditanar College of Engineering in 2019.
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