Shaik Jani is an experienced Application Engineer and Senior Engineer specializing in physical design, with expertise in Synopsys tools such as IC Compiler and Design Compiler. Jani has worked on various Intel projects across multiple technology nodes, including 5nm and 7nm, and has a solid background in block-level place and route, synthesis, and physical verification signoffs. Jani previously served as a Student Trainee at Sumedha IT, where they pursued physical design training in VLSI. Currently, Jani is employed as a Senior Application Engineer at Synopsys Inc, following their role as an ASIC Physical Design Engineer at Capgemini Engineering. Jani holds a Bachelor of Technology in Electronics and Communication Engineering from Amrita Sai Institute of Science & Technology.
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