Sharanya Khamithkar

Sharanya Khamithkar is a Staff Applications Engineer at Synopsys with over 8 years of experience in the semiconductor industry. They specialize in equivalency checking and formal verification, having co-authored papers for Synopsys and Intel, including topics on FEV methodologies and ML-based prediction. They previously worked at Intel as a SoC Design Engineer, leading FEV efforts on 2nm projects, and at Altran, where they contributed to design automation and quality checks. Sharanya holds a Master of Technology in VLSI System Design from M.S. Ramaiah University of Applied Sciences and a Bachelor of Technology in Electronics and Communications Engineering from Intell Engineering College.