Shivananda M C is an AMS verification engineer with expertise in analog mixed signal verification, focusing on technologies such as PCIe, Ethernet, USB 3.0, and DDR. They have created co-simulation setups in the Cadence ADE environment and possess strong skills in Verilog A and Verilog AMS. Shivananda has held positions at various companies including Synopsys Inc, where they currently work as an ASIC Digital Design Engineer Sr II, and has previously contributed to SerDes AMS verification at Eximius Design. They earned a Bachelor's degree in Engineering from DSCE and a Master's degree in VLSI Design and Embedded Systems from JSSATE.
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