Shreya Pawar is currently a Principal Verification Engineer at Synopsys Inc, specializing in front-end verification using Hardware Verification Language (HVL) and has extensive experience in ARM-based verification, IP verification, and sub-module integration. Previously, Shreya held roles at Qualcomm as a Staff Engineer, Intel Corporation as a Pre-Si Validation/Verification Engineer, and as a Verification Engineer at both IntelliProp Inc. and ST Microelectronics. Shreya earned a BE in Electronics from the University of Mumbai and is pursuing higher education in Science at Bhavans College.
This person is not in the org chart
This person is not in any teams
This person is not in any offices