Shubham Patil is a Design Verification Engineer currently working as a Senior Engineer at Synopsys Inc. They have a strong background in the semiconductors industry, with expertise in Universal Verification Methodology (UVM) and SystemVerilog. Shubham previously held positions including Staff Engineer and SOC Engineer, II at Synopsys Inc, and served as a Design Verification Engineer at Cerium Systems from 2019 to 2022. They hold a Bachelor of Engineering in Electrical and Electronics Engineering from All India Shivaji Memorial Society's College of Engineering, Pune, which they completed in 2018.
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