Skanda M J

Skanda M J is a Physical Design Engineer at Synopsys with over 8 years of hands-on experience in synthesis, physical design, static timing analysis (STA), and physical verification. They have worked with technology nodes ranging from 180nm to 10nm and have held positions at prominent companies including Intel Technologies India. Skanda completed their Master’s Degree in VLSI Design from Vellore Institute of Technology and holds a Bachelor of Engineering in Electronics and Communications Engineering from Visvesvaraya Technological University. They are currently involved in projects related to Fusion Compiler and DSO.