Somya Bansal

Somya Bansal is a Staff Engineer at Synopsys Inc, having progressed through roles as a Senior Engineer and R&D Engineer II since November 2022. Prior experience includes serving as a Software Engineer II and a member of the PCIe/CXL Verification IP R&D team at Cadence Design Systems from May 2020 to November 2022. Earlier, Somya contributed as a HEP Student Trainee at Mentor Graphics in 2019, where design and implementation of electronic blocks in Verilog were key responsibilities. Currently pursuing a Master of Technology in Microelectronics through BITS Pilani Work Integrated Learning Programmes, Somya also holds a Bachelor of Technology in Electronics and Communications Engineering from Jaypee Institute of Information Technology, earned in 2020.