Sona Chachan is currently a Staff ASIC DV Engineer at Synopsys, where they focus on PCIE SERDES IP PHY pipe verification. Previously, they held roles at Texas Instruments as a Senior Digital Design Verification Engineer and at Synopsys as both an ASIC Digital Verification Engineer and an SR ASIC DV Engineer, working on high-speed Serdes PHY test chips among other projects. Sona earned a Bachelor of Engineering in Electronics and Communication Engineering from Netaji Subhas Institute of Technology. They are currently pursuing their Secondary School Certificate at Holy Child School Jalpaiguri and Higher Secondary studies at Avinav Public School Delhi.
This person is not in the org chart
This person is not in any teams
This person is not in any offices