Sriram Adiga

Sriram Adiga is a Principal Engineer at Synopsys Inc since October 2014, specializing in PAM4 serdes mixed signal IP design and testchip implementation, overseeing design closure and physical design activities across multiple product lines. Prior experience includes a Master Thesis Student role at Recore Systems focused on network-on-chip research, a Research Assistant position at TU Delft working on imaging sensor design, and several roles at Texas Instruments, where responsibilities ranged from parasitic extraction methodologies to backend design analysis in advanced technology nodes. Sriram holds a Master of Science in Embedded Systems from Delft University of Technology and an Integrated Master of Science in Microelectronics from Birla Institute of Technology and Science, along with a Diploma in Electronics from NTTF.