Stavros Simoglou

Stavros Simoglou is an experienced professional in the field of Electronic Design Automation and Research and Development with a robust background in teaching and practical application. Having served as a Laboratory Supervisor at the University of Thessaly and gained industry experience through roles at Qualcomm and Pedion Consultants, Stavros has contributed to various projects involving SQL Server development and ASIC Backend EDA Tool functionality. Currently, Stavros is a Staff R&D Engineer at Synopsys Inc and a Research Associate at the Circuits and Systems Lab UTH, focusing on Static Timing Analysis engine development while pursuing a PhD in Electrical, Electronics, and Computer Engineering. Educational qualifications include a Master of Engineering from the University of Thessaly and a Doctor of Philosophy in progress.