Suresh V

Suresh V is a seasoned Principal Engineer at Synopsys, where they have been involved in advanced FPGA solutions since 2020. They possess over 19 years of experience in Electronic Design Automation (EDA), having held various roles at Synopsys where they contributed to low power solutions and verification. Suresh completed a PG level advanced certification in VLSI Chip Design at the Indian Institute of Science in 2023 and earned a BE in Computer Science and Engineering from the College of Engineering, Guindy in 2006.