Sushmitha Ramesh

Sushmitha Ramesh is a Pre-Silicon Verification Engineer with over four years of hands-on experience in functional verification. They have developed comprehensive verification environments using SystemVerilog and executed various test cases to validate complex RTL designs. Currently a R&D Staff Engineer at Synopsys Inc, Sushmitha has previously interned at Intel Corporation and worked as a Design Verification Engineer at Tech Mahindra Cerium Pvt Ltd. Sushmitha holds a Bachelor’s degree in Electronic and Communications Engineering from Maharaja Institute of Technology and a Master’s degree in VLSI from Vellore Institute of Technology.