Suvendu Saha

Suvendu Saha is an accomplished Application Engineer Staff at Synopsys, specializing in the qualification of VCS through onsite testing, customer engagement, and debugging design failures. With extensive experience as a former Principal Product Validation Engineer at Cadence Design Systems, Suvendu has expertise in Verilog/SystemVerilog and mixed-language testing, having written tests in SystemVerilog/UVM to validate simulator features. Suvendu's background includes a role as Lead Product Validation Engineer and contributions to performance assurance and regression testing of software applications. They hold a Bachelor of Technology in Electronics and Communications Engineering and a PG diploma in VLSI.