Ted Irvine

Ted Irvine is a seasoned ASIC/FPGA Design Engineer with over 20 years of experience in team leadership and system-level architecture design. They have held various roles across leading companies, including Senior Manager of ASIC Design at Synopsys Inc. and Design Lead at Intel Corporation. Ted’s expertise spans the design and verification of complex hardware accelerators, enabling speedy delivery of products and efficient team mentorship. They hold an MSc in Electronics and a Diploma in Management Practice, complementing their strong technical background with managerial skills.