Tharun Teja

Tharun Teja is an experienced Staff Application Engineer at Synopsys Inc since October 2019, with a focus on deploying QoR and debug functionalities for efficient FPGA prototyping on HAPS, providing dedicated support to strategic FPGA prototyping accounts, and analyzing and debugging issues to offer effective solutions. Prior roles at Synopsys include Sr Applications Engineer and Application Engineer II. Tharun's experience also includes a Technical Intern position at the National Institute of Technology Rourkela and a brief role as a Teaching Assistant at apgenco, along with an internship on Controlling and Instrumentation at a power generation corporation. Tharun holds a Master of Technology in VLSI Design and Embedded Systems from the National Institute of Technology Rourkela and a Bachelor of Technology in Electronics and Communication Engineering from JNTUCEP, complementing foundational education in Maths and Science from Sri Chaitanya Bharathi Jr College.