Tom Jose

Tom Jose is a Senior Staff ASIC Design Engineer at Synopsys, where they specialize in hardware design, focusing on logic design, interface design, and hardware/software co-processing. Tom holds a Master’s Degree in Electrical Engineering (VLSI Design) from the University of Cincinnati and a Bachelor’s Degree in Electronics and Communication from the College of Engineering Trivandrum. Previously, they worked at AMD as an MTS Silicon Design Engineer and contributed significantly to multiple projects at CG CoreEl, including high-speed RTL design and FPGA prototyping. Tom's experience also includes work as an ASIC Design Engineer at Tactual Labs, where they focused on hardware acceleration for gesture recognition algorithms.