Victor Avendano

Victor Avendano is an experienced professional in the field of integrated circuit (IC) design and validation, currently serving as Site Manager at Synopsys, Inc. since September 2020. Prior to this, Victor held the position of Design For Test (DFT) Lead at FirstPass Global, Inc. and served as a Sr DFT Engineer at Wipro Limited, focusing on high-performance IP and System on Chip designs. Victor's background includes roles at Intel Corporation as a System Validation Engineer and Freescale Semiconductor Mexico, where significant contributions were made as a Senior Design For Test Engineer and in functional verification. Beginning as a researcher at INAOE, Victor holds a Ph.D. in IC design and on-chip verification from Instituto Nacional de Astrofísica, Óptica y Electrónica.