Vijay C has extensive experience in layout design, having worked in various roles such as Senior Layout Designer and Analog Layout Engineer at Sankalp Semiconductor from June 2018 to February 2022, and as a Layout Designer at HCL Technologies during the same period. Currently, Vijay serves as an Analog & Mixed Signal Layout Design Engineer II at Synopsys Inc since February 2022. Education includes a Bachelor of Technology (BTech) at Birla Institute of Technology and Science, Pilani, expected to complete in 2025, along with a Diploma in Electrical and Electronics Engineering obtained from Govt. Polytechnic College in 2018.
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