Vivek Saurabh

Vivek Saurabh is an AMS Design Engineer at Synopsys, specializing in Analog Circuit design within advanced technology nodes such as 7nm and 11nm. They have a strong background in High Speed SerDes block design, Non-Volatile Memories, and layout challenges, with a journal accepted on ReRAM-based in-memory computation. Previously, Vivek worked as a Senior Silicon Design Engineer at AMD and held positions at Synopsys, including Analog Design Engineer Staff and Senior Analog Design Engineer. They earned a Master of Technology in VLSI Design from the Indian Institute of Engineering Science and Technology, Shibpur, and a Bachelor of Technology in Electronics and Communication Engineering from Heritage Institute of Technology, Kolkata.